JoeV
Thin Air, Bright Sun
Er, not exactly. This would be equivalent to taking a hacksaw to a circuit board in the hopes of making a smaller circuit board that still functions. Individual die on a silicon wafer are cut out, using diamond saws, at assembly/test, but they are cut along the scribe lines between individual chips. You can't hack a photo-diode array and hope that the remaining cells of the array will still function. The thickness of the saw cut is much larger than the micron-sized diodes. There are also read-out and processing circuitry in the periphery of each die surrounding the diode array; so hacking the chip destroys the peripheral circuitry, which functions effectively as a custom graphics processor.
Individual die cost in semiconductor manufacturing are most efficiently improved by engineering improvements in the manufacturing line that increase line yield (the percentage of wafers that make it to end of line intact) and die yield (the percentage of die on each wafer at end of line that function properly). It is highly likely that kodak's chip factory makes the S2, M8 and supposed M9 image sensors in the same manufacturing line on the same machines, but they are each processed in distinctly separate lots; the lithographic masks for each type of sensor are distinctly different, so different reticles (the litho mask patterns at each layer) are used in the steppers for each different product type.
Where cost savings for the S2 chip are made with the M8 and/or M9 chips is most likely due to the same machines being used to make all three, so that a higher profit-margin product like the M8 chip (smaller die size, more die per wafer, higher revenue per wafer due to smaller defect levels due to decreased area size) offset the higher cost, reduced yields of the larger sensors.
Also, any process improvements in the line that increase S2 die yield will also improve M8/M9 die yield (since they are all three made on the same machines), improving profitability for these other products, too.
~Joe
EDIT: I must also add that it has been a common practice for years to employ a "masking ROM" in parallel with an image sensor, whereby dead pixels in the sensor array (FYI: there are no perfect sensors) are mapped in a custom-burned ROM that accompanies each sensor, such that the live pixels surrounding the dead ones are read and their voltage levels averaged, so as to synthesize the dead pixel's appropriate voltage. So the output from the sensor chip is processed through the masking ROM to mask, or hide, the dead pixels. This goes a long way to making more die per wafer practically salable.
An example would be my Lumix G1, which has a menu feature whereby the sensor can be remapped and dead pixels effectively can be eliminated from the image. This most likely employs a masking ROM that is flash-memory based; the image sensor is remapped and the new map of dead pixels written into the flash memory masking ROM.
FYI: It is also probable that masking ROMs may now be manufactured within the periphery of each image sensor die, rather than packaged from a physically separate ROM chip; the size of a ROM memory cell can be made much smaller than a CCD or CMOS image sensor pixel, since light collection area is not an issue with memory arrays.
Similarly, in microprocessor manufacturing, the die with more defects usually operate at slower speeds, so they are binned out and sold as lower end products. The processors that test at higher speeds are conversely sold as higher-end products.
Last edited:
